Camera having a digital exposure value display device

ABSTRACT

A camera has a digital exposure display device and a digital fixed point match type exposure display device. The digital exposure display device compares a voltage associated with an exposure value such as a shutter time value or an aperture value obtained from exposure operating means with a plurality of reference voltages produced by a reference voltage generating circuit and thereby converts the exposure value into a digital signal and digitally displays the exposure value on the basis of said digital signal. The digital fixed point match type exposure display device comprises an exposure value setting circuit for generating a voltage associated with a manually set exposure value, differential amplifier circuit means for producing a voltage including a voltage corresponding to the difference between the voltage of the exposure value setting circuit and the voltage obtained from the exposure operating means, forming means for forming a first comparison voltage and a second comparison voltage greater than the first comparison voltage by using the output voltage of the reference voltage generating circuit, comparing means for comparing the comparison voltage of the forming means with the output of the differential circuit means and generating a first signal variable in condition depending on whether said output is smaller or greater than the first comparison voltage and a second signal variable in condition depending on whether said output is greater or smaller than the second comparison voltage, and display means operative to effect a display based on the first and second signals of the comparing means.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a camera having a digital exposure valuedisplay device.

2. Description of the Prior Art

A digital exposure value display device for displaying a manually set orautomatically controlled shutter time value or aperture value as adigital value in the viewfinder of a camera is known. Such digitalexposure value display device requires a highly accurate referencevoltage generating circuit for generating a number of reference voltagesof different levels to quantize a voltage associated with the exposurevalue to be displayed.

Also known is a digital fixed point match type exposure display devicefor digitally displaying whether a manually set shutter time or aperturevalue provides a proper exposure or an under-exposure or anover-exposure, by the use of a plurality of display elements such aslamps or the like. This has, for example, three LEDs (light emittingdiodes) and displays the proper exposure by the turn-on of a first LED,the under-exposure by the turn-on of a second LED, and the over-exposureby the turn-on of a third LED. Such digital fixed point match typeexposure display device also compares a voltage representing a manuallyset exposure value with a plurality of reference voltages andnecessarily requires a highly accurate reference voltage generatingcircuit.

Therefore, a camera provided with both the digital exposure valuedisplay device and the digital fixed point match type exposure displaydevice requires two highly accurate reference voltage generatingcircuits and this results in a high cost of the camera.

Also, a camera which permits selection of automatic exposure setting andmanual exposure setting requires a reference voltage generating circuitfor an exposure value display device which displays an automaticallycontrolled shutter time or aperture value as a digital value in theviewfinder of the camera, and a reference voltage generating circuit forgenerating a voltage corresponding to a set value provided by rotationof a shutter dial or the like. Again in the case, there is adisadvantage that two highly accurate reference voltage generatingcircuits are required.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a camera having adigital exposure value display device which is lower in cost ofmanufacture and yet has the same accuracy as the prior art cameras andmoreover is simple in construction because the reference voltagegenerating circuit of the digital exposure value display device is usedalso as the reference voltage generating circuit of the digital fixedpoint match type exposure display device.

It is another object of the present invention to provide a camera whichis lower in cost of manufacture and yet has the same accuracy as theprior art cameras and moreover is simple in construction because thereference voltage generating circuit for the digital exposure valuedisplay device is used also as the reference voltage generating circuitfor the manual exposure setting.

The invention will become fully apparent from the following detaileddescription thereof taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram of the aperture priority type automaticexposure single lens reflex camera according to an embodiment of thepresent invention.

FIGS. 2 to 7 show the displays of the display device of FIG. 1.

FIG. 8 is a circuit diagram of a portion for changing over the displayof the digital display circuit of FIG. 1.

FIG. 9 shows the timing of the reset pulse, sampling pulse and blankingpulse of CL₁, CL₂ and CL₃ of FIG. 8.

FIG. 10 is a circuit diagram of the aperture priority type automaticexposure single lens reflex camera according to another embodiment ofthe present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 shows the circuit of the aperture priority type automaticexposure single lens reflex camera according to an embodiment of thepresent invention.

A photoelectric converting circuit 1 has a photodiode P which receivesthe object light passed through a phototaking lens, and produces anoutput proportional to the logarithm of the object brightness, namely, aluminance value Bv. A variable resistor 2 has its resistance valuevaried in accordance with the set film speed and the set aperture value,and generates the difference Sv-Av between the logarithm of the filmspeed, namely, the ASA speed value Sv, and the logarithm of the aperturevalue, namely, the aperture value Av. An exposure operational circuit 3produces a time value Tv which provides the logarithm of a propershutter time, namely, a proper exposure, from the outputs of thephotoelectric converting circuit 1 and the variable resistor 2.

The voltage of this time value Tv is produced to an output line 4 as thepotential difference from the + side potential of a power source E. Theoutput voltage of the exposure operational circuit 3 is transmittedthrough a memory switch 5 to a memory capacitor 6. The memory switch 5is opened at the start of the exposure prior to the movement of a mirrorfor directing light to a viewfinder and the photodiode P. Accordingly,the voltage immediately before the memory switch 5 which prescribes theshutter time value is opened is memorized in the memory capacitor 6. Thevoltage of the memory capacitor 6 is connected to the automatic exposureterminal a of a shutter time change-over switch 7 through a followeramplifier A₁ of a high input impedance. An output voltage associatedwith the time value from a shutter time manual setting circuit Tcomprising serial resistors r₁, r₂, r₃, . . . and a constant currentsource 20 is imparted to the other terminals of the shutter timechange-over switch 7, namely, manual shutter time selecting terminals b,c, d, . . . When the shutter time change-over switch 7 selects theterminal a, the automatic exposure mode takes place, and when theshutter time change-over switch 7 selects the terminals b, c, d, . . . ,the manual exposure mode takes place. Voltages associated with the timevalue Tv of shutter times 1/2000 sec., 1/1000 sec/., 1/500 sec., . . .are generated at the terminals b, c, d, . . . The voltage selected bythe shutter time change-over switch 7 is applied to one input of acomparator Co, and the charging voltage of a capacitor 9 whose chargingis adjusted by a shutter timer circuit 8 is applied to the other inputof the comparator Co. A trigger switch 10 is opened when the forwardcurtain of the shutter starts to move, whereby the capacitor 9 starts tobe charged. The charging current of the shutter timer circuit 8 isadjusted so that the charging voltage of the capacitor 9 is proportionalto the logarithm of the time lapse from the opening of the triggerswitch 10. The operation thereof is such that before the aforementionedmirror starts to move upon depression of a shutter release button, notshown, the memory switch 5 is opened and substantially in synchronismtherewith, a magnet energizing switch 11 is closed and at that time, theoutput of the comparator C_(o) assumes H (high) level. Accordingly, acurrent flows to a magnet 12 for holding the rearward shutter curtain toenergize this magnet 12, and the rearward shutter curtain is restrainedby a rearward shutter curtain holding mechanism. When the movement ofthe mirror is completed and the forward shutter curtain starts to move,the trigger switch 10 is opened and the capacitor 9 starts to be chargedby the shutter timer circuit 8. The charging voltage of the capacitor 9proportional to the logarithm of time and the voltage selected by theshutter time change-over switch 7 are compared by the comparator C_(o)and, when the charging voltage drops below the selected voltage, theoutput of the comparator C_(o) changes to L (low) level and as a result,the magnet 12 is deenergized and the rearward shutter curtain is closed.Thereafter, the aforementioned mirror returns to its initial position,whereupon the memory switch 5 is again closed and the magnet energizingswitch 11 becomes open. Such an operation sequence is well-known insingle lens reflex cameras.

A reference voltage generating circuit F₁ comprising a plurality ofseries-connected resistors R₁ -R_(n) and a constant current source 13produces a plurality of reference voltages to the junctions between theresistors. The differences between the reference voltages at theadjacent junctions are all constant, i.e., ΔV. Each reference voltage isthe potential difference from a voltage having the + side potential ofthe power source E as the reference, namely, the + side potential. Thelowest reference voltage of the reference voltage generating circuit F₁,namely, the voltage intermediate of the voltage at the junction betweenthe resistors R₁ and R₂ and the voltage at the junction between theresistors R₂ and R₃, corresponds to the time value T_(v) of the highestcontrollable shutter time 1/2000 sec. of the shutter of this camera, andlikewise, the highest reference voltage of the reference voltagegenerating circuit F₁, namely, the voltage intermediate of the lower endvoltage of the resistor R_(n) and the voltage at the junction betweenthe resistors R_(n) and R_(n-1), corresponds to the time value T_(v) ofthe lowest controllable shutter time, for example, 8 sec., of theshutter. A voltage representing the shutter time to be controlled,namely, the selected voltage selected by the shutter time change-overswitch 7, is applied in common to one input terminal of each ofcomparators C₁ -C_(n), and said reference voltages are applied to theother input terminals of these comparators. A parallel comparisonprocessing type A/D converter circuit is constituted by the referencevoltage generating circuit F₁ and comparators C₁ -C_(n), and by theoutput of this converter circuit, a digital display circuit 14 isoperated to drive a shutter time display device 15. This display circuit14 has a segment decoder and a dynamic driving or a static drivingcircuit in accord with the characteristic of the display device and thedivision number of segments. A digital fixed point match type exposuredisplay circuit for manual exposure setting is constituted bydifferential circuit means D comprising follower amplifiers A₂, A₃, A₄and a differential amplifier A₅ including resistors R_(a), R_(b), R_(c),R_(d) ; comparing means C comprising comparators C_(a) , C_(b), C_(c),C_(d), insensitive zone width change-over gates G₁, G₂, G₃, G₄, G₅, G₆,switch 16 and gate 18; forming means for applying a voltage from part ofthe reference voltage generating circuit F₁ to the comparing means Cthrough lines l1-l4; the display circuit 14; and the display device 15.The insensitive zone width during the fixed point match can be selectedby an insensitive zone width change-over switch 16 which controls thegates G₁ -G₄. A switch 17 is operatively associated with the shuttertime change-over switch 7. When the switch 7 selects the automaticexposure terminal a, namely, during the automatic exposure mode, theswitch 17 becomes closed. The close signal of the switch 17 istransmitted to the digital display circuit 14. The digital displaycircuit 14 neglects the output condition of the gates G₅, G₆ by theclose signal of the switch 17 and also determines the display of themarks and of the display device 15 only by the conditions of thecomparators C₁ -C_(n). At the same time, the digital display circuit 14renders into erased condition the display of the mark M of the displaydevice 15 which indicates the manual setting mode. With the shutter timechange-over switch 7 having selected any other terminal than theterminal a, the switch 17 becomes open. When the switch 17 becomes open,the ditigal display circuit 14 determines the display of the marks andof the display device 15 by the outputs of comparators C_(a), C_(b),C_(c) and C_(d), namely, the outputs of the gates G₅ and G₆. At the sametime, it displays the mark M and indicates the manual setting mode.

Operation will now be described.

First, in the case of the automatic exposure mode in which the shuttertime is automatically controlled, the change-over switch 7 is connectedto the terminal a and the switch 17 is closed. By the closing of theswitch 17, the outputs of the gates G₅ and G₆ are neglected by thedigital display circuit 14 and, in the display device 15, the mark Mrepresenting the manual setting of the shutter time disappears. When theproper shutter time output voltage of the exposure operational circuit 3exceeds the highest controllable shutter time (1/2000 sec.) of theshutter, that voltage is smaller than the reference voltage at thejunction between the resistors R₁ and R₂ (that is, the output potentialof the exposure operational circuit 3 is higher than said referencepotential) and therefore, the outputs of all of the comparators C₁-C_(n) assume L level. In accordance with these L-level outputs, thedisplay circuit 14 causes the display device 15 to display 2000 as shownin FIG. 2. This display shows that the proper shutter time is fasterthan 1/2000 sec. and a proper exposure cannot be obtained. Also, whenthe proper shutter time output voltage of the exposure operationalcircuit 3 corresponds to the shutter time of 1/250 sec., this voltage isa voltage between the reference voltages of the comparators C₄ and C₅and so, the outputs of the comparators C₁ -C₄ assume H (high) level andthe outputs of the comparators C₅ -C_(n) assume L Level, and the digitaldisplay circuit 14 causes the display device 15 to display "250" asshown in FIG. 3. When the proper shutter time output voltage of theexposure operational circuit 3 indicates a shutter time longer than thelowest controllable time (for example, 8 sec.) of the shutter, all ofthe comparators C₁ -C_(n) produces H-level outputs. On the basis ofthese H-level outputs, the digital display circuit 14 causes the displaydevice 15 to display 8⁻ as shown in FIG. 4. "8" represents that theshutter time is not 1/8 sec. but 8 sec., and shows that the propershutter time is longer than 8 sec.

Description will now be made of the display in the case of the shuttertime manual setting mode. The change-over switch 7 selects one of theother terminals b, c, . . . . . than the terminal a. Assume that thechange-over switch 7 has selected the terminal f. A voltagecorresponding to the shutter time 1/125 sec. appears at this terminal fand therefore, the parallel comparison processing type A/D convertercircuit, namely, the reference voltage generating circuit F₁ and thecomparators C₁ -C_(n) produce outputs corresponding to that voltage andthe digital display circuit 14 causes the display device 15 to display"125" as shown in FIG. 5. At this time, the switch 17 is in its OFFposition and therefore, the digital display circuit 14 causes thedisplay device 15 to display "M" while, at the same time, the outputs ofthe gates G₅ and G₆ become effective. Thus, the fixed point match typeexposure display circuit for the shutter time manual setting mode isoperated. That is, the differential circuit means D amplifies thedifference between the manually set shutter time voltage V₁ applied tothe follower amplifier A₂ and the proper shutter time voltage V₂ of theexposure operational circuit 3 applied to the follower amplifier A₄,with the voltage V₀ at the junction between the resistors R₃ and R₄ asthe reference voltage. If the values of the resistance R_(a) -R_(d) ofthe differential amplifier circuit are defined as

Ra/Rb=Rd/Rc=G,

the output voltage of the differential amplifier circuit A₅ is

    V.sub.A5 =G(V.sub.1 -V.sub.2)+V.sub.0                      (1),

where V_(O), V₁, V₂ and V_(A5) are represented in the potentialdifference from the + side of the power source E. This output voltageV_(A5) is compared with the voltage at the junction between theresistors R₂ and R₃ by the comparator C_(a), with the potential at thejunction between the resistors R₁ and R₂ by the comparator C_(b), withthe potential at the junction between the resistors R₄ and R₅ by thecomparator C_(c), and with the potential at the junction between theresistors R₅ and R₆ by the comparator C_(d). Now, if the insensitivezone width change-over switch 16 is in its OFF position, the output ofthe inverter 18 is at L level and therefore, the gates G₂ and G₄ becomeclosed. On the other hand, the gates G₁ and G₃ are open and after all,only the outputs of the comparators C_(a) and C_(c) become effective.The voltage across each resistor R₂ -R_(n) is ΔV and therefore, thereference input voltage of the comparator C_(a) is V_(O) -ΔV and thereference input voltage of the comparator C_(c) is V_(O) +ΔV. The outputof the comparator C_(a) is at L level when V_(A5) <V₀ -ΔV, and is at Hlevel when V_(A5) ≧V₀ -ΔV, and the output of the comparator C_(c) is atH level when V_(A5) ≦V₀ +ΔV, and is at L level when V_(A5) >V₀ +ΔV.

Accordingly,

(1) when V_(A5) =G(V₁ -V₂)+V₀ <V₀ -ΔV, namely, when the manual shuttertime voltage V₁ is smaller by ΔV/G or more than the proper shutter timevoltage V₂, the output of the comparator Ca assumes L level and theoutput of the comparator C_(c) assumes H level. These two outputs areapplied through the gates G₅ and G₆ to the digital display circuit 14,which thus causes the display device 15 to display the mark which showsthat under-exposure takes place at the manually set shutter time 1/125sec., as shown in FIG. 5.

(2) When V_(A5) =G(V₁ -V₂)+V₀ >V₀ >V₀ +ΔV, namely, when V₁ is greater byΔV/G or more than V₂, the output of the comparator C_(a) assumes H leveland the output of the comparator C_(c) assumes L level. In the samemanner as described above, on the basis of these two outputs, thedigital display circuit 14 causes the display device 15 to display themark which shows that under-exposure takes place at the manually setshutter time, as shown in FIG. 6.

(3) When V₀ -ΔV≦G(V₁ -V₂)+V₀ ≦V₀ +ΔV, namely, when the differencebetween V₁ and V₂ is within ±ΔV/G, both the outputs of the comparatorsC_(a) and C_(c) assume H level and, on the basis of these two outputs,the digital display circuit 14 causes the display device 15 to displaythe mark which represents the proper exposure, as shown in FIG. 7. Inthis manner, the fixed point match type exposure display circuit has aninsensitive zone width during the proper exposure of 2ΔV/G and, even ifV₁ is not in accord with V₂, if the difference therebetween is within±ΔV/G, it displays it as a proper exposure. This insensitive zone width2ΔV/G, in spite of its being produced by utilizing the referencevoltages V₀, V₀ +ΔV and V₀ -ΔV of the parallel comparison processingtype A/D converter circuit, is determined by a value G which in turn isdetermined by the resistors R_(a) -R_(d) independently of thequantitizing width ΔV of this A/D converter circuit.

Thus, in the case of the shutter time manual setting mode, the fixedpoint match type exposure display which digitally displays whether theshutter time value thereof provides over-exposure or under-exposure orproper exposure is effected while, at the same time, the manually setshutter time value is displayed in the form of a digital value.

When the insensitive zone width change-over switch 16 is closed toenlarge the insensitive zone width, a ground potential is applied to thegates G₁ and G₃ and therefore, these are closed while, on the otherhand, the output of the inverter 18 assumes H level and therefore, thegates G₂ and G₄ are opened. Accordingly, only the outputs of comparatorsC_(b) and C_(d) are applied to the digital display circuit 14 throughthe gates G₂, G₄, G₅, G₆. The voltage V₀ - 2ΔV at the junction betweenR₁ and R₂ and the voltage V₀ + 2ΔV at the junction between R₅ and R₆ andrespectively applied to the reference input voltages of comparatorsC_(b) and C_(d) and after all, the insensitive zone width during theproper expsoure at this time becomes twice what has been previouslymentioned, i.e., 4ΔV/G.

Generally, it is desirable that in the case of a film having a narrowlatitude such as color positive film, the insensitive zone width bedetermined to the order of ±1/4E_(v) and that in the case of a filmhaving a wide latitude such as color or monochromatic negative film, theinsensitive zone width be determined to the order of ±1/2Ev. Therefore,when the former film is used, the insensitive zone width change-overswitch 16 may be opened, and when the latter film is used, theinsensitive zone width change-over switch 16 may be closed. In FIG. 7,the fit condition of the exposure is indicated by displaying both of themarks and , but it may also be indicated by erasing these two marks thatthe exposure is in fit condition. FIG. 8 shows the circuit of theportion which effects the display change-over of the display circuit 14.Here, the number of the comparators C₁ -C_(n) of FIG. 1 is determined tosixteen. Accordingly, C_(n) is C₁₆. Sampling gates G₁₁ -G₂₆ comprisingNAND gates have one input thereof connected to the output of eachcomparator C₁ -C₁₆ and the other input thereof connected to a line CL₂of sampling pulse. For the data latch, the outputs of the NAND gates G₁₁-G₂₆ are connected to the set inputs S of L trigger type RS flip-flopsFF₁ -FF₁₆. The reset terminals R of the RS flip-flops FF₁ -FF₁₆ areconnected to a reset line CL₁. A display sequence control circuits 50generates a reset pulse generated at CL₁ for periodically refreshing thedisplay to prevent flickering or the like of the display, a samplingpulse generated at CL₂, a blanking pulse CL₃ for erasing the display sothat a wrong display is not effected during the time that reset andsampling are effected, and a control pulse for display columnchange-over signal or the like when the driving of the display isdynamic. The RS flip-flops FF₁ -FF₁₆ are such that when the S terminalsthereof are triggered, the Q terminals thereof assume H level and the Qterminals thereof assume L level and that when the R terminal thereof istriggered, the Q and Q terminals thereof are held in the reversecondition.

A drive circuit 51 includes a segment decoder circuit, a segment drivingcircuit, a column driving circuit, etc., and drives the display device15 by the conditions of shutter time display input terminals T₁ -T₁₅,mark display input terminal T₀, mark display input terminal T_(u) and Mdisplay input terminal T_(M). The shutter time display input terminalsT₁, T₂, T₃, T₄, . . . . . T₁₅ respectively correspond to the shuttertimes 1/2000 sec., 1/1000 sec. 1/500 sec., 1/250 sec., . . . . . 8 sec.,and T₁ and T₁₅ are respectively connected to the Q output of FF₂ and theQ output of FF₁₅, and T₂ -T₁₄ are connected to the outputs of AND gatesG₃₁, G₃₂, . . . . . controlled by the output conditions of FF₂ -FF₁₅.When the inputs to the display input terminals T₁ -T₁₅, T_(o), T_(u) andT_(M) are at H level, the drive circuit 51 effects a displaycorresponding thereto.

Gates G₄₁, G₄₂ and G₄₅ change over the display control of mark by theautomatic or the manual exposure mode. Likewise, gates G₄₃, G₄₄ and G₄₆change over the display control of mark . The operation thereof isperformed in the following manner.

Description will be made of the case of the automatic exposure mode,namely, the time when the switch 17 is in its closed position. When theswitch 17 is in its closed position, the input of the gates G₄₂ and G₄₄assume L level and therefore, the outputs of the gates G₆ and G₅ areneglected and the drive circuit 51 is affected in no way. On the otherhand, the output of inverter G₄₇ is at H level and therefore, theconditions of the outputs of the gates G₄₁ and G₄₃ are determined by theoutputs of the flip-flop FF₁ and FF₁₆, respectively.

Also, the M display input terminal T_(M) of the drive circuit 51 is at Llevel and so, the M display is erased. Assuming that the exposureoperational circuit 3 is generating a voltage corresponding to a shutterspeed faster than 1/2000, then the outputs of the comparators C₁ -C₁₆are all at L level. Accordingly, even if the sampling pulses of thegates G₁₁ -G₂₆ assume H level, the output of each gate is not varied andtherefore, the flip-flops FF₁ -FF₁₆ remain in reset condition and the Qoutput of the flip-flop FF₁ is at H level. And therefore, the outputthereof renders the mark display input terminal T₀ into H level throughthe gates G₄₁ and G₄₅ to display mark and the 2□□□ display inputterminal T₁ connected to the Q output of the flip-flop FF₂ is at Hlevel, thus effecting the display of 2□□□. When the exposure operationalcircuit 3 is generating a voltage corresponding to the shutter speed1/2000, only the output of the comparator C₁ is at H level and theoutputs of the other comparators are all at L level. Accordingly, whenthat condition is sampled, only the flip-flop FF₁ is set and therefore,the Q output of the flip-flop FF₁ assumes L level and the mark displayinput terminal T_(O) and assumes L level and thus, the mark is erased,but since the flip-flop FF₂ remains in reset condition, 2□□□ displayinput terminal assumes H level, thus displaying 2□□□. When the exposureoperational circuit 3 is producing a voltage corresponding to theshutter time 1/1000, the outputs of the comparators C₁ and C₂ assume Hlevel and accordingly, when that condition is sampled, the flip-flopsFF₁ and FF₂ are reversed and as described previously, the mark displayinput terminal T₀ is at L level and so, the mark is not displayed, andthe output of the gate G₃₁, namely, the 1□□□ display input terminal T₂assumes H level and thus, the display of 1□□□ is effected. Likewise,when the exposure operational circuit generates voltages correspondingto longer shutter times, the number of the comparators generatingH-level output increases to the comparators C₁, C₂, C₃, . . . . . andalong therewith, the display input terminal corresponding to the shuttertime thereof assumes H level, thus displaying that shutter time, and themark remains erased. When the shutter time becomes longer than 8 sec.,all the comparators C₁ -C₁₆ generate H-level outputs and all of theflip-flops FF₁ -FF₁₆ are reversed. By the reversal of the flip-flopFF₁₅, the 8 sec. display input terminal T₁₅ assumes H level to effectthe display of 8⁻, and by the reversal of the flip-flop FF₁₆, the Qoutput thereof assumes H level and it renders the mark display inputterminal T_(u) into H level through the gates G₄₃ and G₄₆ and thus, themark is also displayed.

In the case of the manual setting mode, namely, when the switch 17 is inits open position, the common input of the comparators C₁ -C₁₆ ischanged over from the output of the exposure operational circuit 3 tothe output side of a manual shutter time setting circuit r₁ R₂ . . . . .20 and therefore, the outputs of the comparators C₁ -C₁₆ aresuccessively changed over in accordance with the manually set value, aspreviously described and along therewith, the display control of themanually set value is effected. Due to the switch 17 being in its openposition, the input of inverter G₄₇ assumes H level and therefore, theoutput thereof assumes L level and the gates G₄₁ and G₄₃ are fixed toL-level outputs and thus, the control signals by the flip-flops FF₁ andFF₁₆ are neglected and the outputs of the gates G₄₂ and G₄₄ aredetermined by the output conditions of the gates G₆ and G₅ connected tothe inputs of the gates G₄₂ and G₄₄, respectively. Also, the M displayinput terminal T_(M) assumes H level, thus displaying the manual settingmode as the display of M. In the case of a proper exposure, aspreviously described, both the gates G₅ and G₆ are producing H-leveloutputs and both of the marks and display input terminals T_(O) andT_(u) assume H level, displaying both of the marks and . When theexposure is under, the output of the gate G₆ is at L level and theoutput of the gate G₅ is at H level and so, the mark is erased and onlythe mark is displayed, thus indicating that the exposure is under. Whenthe exposure is over, the output of the gate G₆ is at H level and theoutput of the gate G₅ is at L level and so, the mark is displayed whilethe mark is erased, thus indicating that the exposure is over.

FIG. 9 shows the timing of the reset pulse, sampling pulse and blankingpulse. As seen, during the time t₀ -t₁, a line CL₁ is rendered intoL-level output to reset the flip-flops FF₁ -FF₁₆, and during the time t₁-t₂, a line CL₂ output is rendered into H level to effect sampling andcause the conditions of the comparators C₁ -C₁₆ to be stored in theflip-flops FF₁ -FF₁₆, and during the time t₂ -t₃, a line CL₃ is renderedinto H level to effect the display. During the time t₀ -t₂, a line CL₃is rendered into L level to erase the display so that a wrong display isnot effected. The display is periodically refreshed with the time t₀ -t₃as a period, and a time of the order of 0.01-0.5s is usually chosen assuch time.

In FIG. 8, both the marks and are displayed in the case of the properexposure play during the manual setting mode, whereas it is alsopossible that both of these two marks are erased in the case of properexposure and the mark is displayed in the case of over-exposure and themark is displayed in the case of under-exposure. In that case, theoutput of the gate G₅ may be connected to the input of the gate G₄₂through an inverter and the output of the gate G₆ may be connected tothe input of the gate G₄₄ through an inverter.

FIG. 10 shows an aperture priority type automatic exposure single lensreflex camera according to another embodiment of the present invention.

Herein, the reference voltage generating circuit F₂ of the A/D convertercircuit is utilized as the manual shutter time setting reference voltagegenerating circuit. That is, the circuit T of FIG. 1 is used also as thecircuit F₂. A circuit 60 is an arrangement of the essential portions ofthe comparing means C of FIG. 1, namely, circuit elements C_(a) -C_(d),G₁ -G₆ and A₂ -A₄. A current is supplied from a constant current source70 to an operational amplifier A₁₀. A switch 80 is closed during theautomatic exposure mode to short-circuit a resistor 90. Manual shuttertime selecting terminals b', c', . . . are respectively connected to thejunction between resistors R₁ and R₂, the junction between resistors R₂and R₃, . . . The voltage at the junction between R₁ and R₂, the voltageat the junction between R₂ and R₃, . . . are respectively lower by ΔV/2than the voltages corresponding to the shutter times 1/2000 sec., 1/1000sec., . . . and therefore, the voltages applied as 1/2000 sec., 1/1000sec., . . . to the input terminal of comparator C_(o) during the manualexposure mode must be the voltage at the junction between R₁ and R₂, thevoltage at the junction between R₂ and R₃, . . . plus ΔV/2.

The value of the resistors 90 and the current value of the constantcurrent source 70 are determined so that when the switch 80 is open, thevoltage drop of the resistor 90 is ΔV/2. Thus, when the change-overswitch 7 selects the manual shutter time selecting terminals b', c', . .. , the voltage at the junction between R₁ and R₂, the voltage at thejunction between R₂ and R₃, . . . , plus ΔV/2, are applied to the inputterminal of the comparator C_(o). The voltages of b', c', . . . soselected are shifted by a correction voltage ΔV/2 produced by theconstant current source 70, resistor 90 and operational amplifier A₁₀and therefore, a voltage corresponding to a desired shutter time isapplied to the comparator C_(o).

During the automatic exposure mode, namely, when the change-over switch7 has selected the automatic exposure terminal a', the correctionvoltage ΔV/2 is unnecessary and so, the switch 80 is closed and theoutput of follower amplifier A₁ is intactly applied to the comparatorC_(o).

Also, in the present embodiment, the display of the fixed point matchwhen a shutter time is manually selected is accomplished by closing andopening the insensitive zone width change-over switch 16 to therebyselect the outputs of the comparators C_(a) -C_(d) are arbitarily changeover the insensitive zone width, but instead of doing so, if thecomparators C_(a), C_(b), C_(c) and C_(d) are connected to the digitaldisplay circuit 14 so that (1) when the exposure is over as comparedwith the wider insensitive zone width, only the mark is continuouslydisplayed, (2) when the exposure is in fit condition in the widerinsensitive zone width but is over as compared with the narrowerinsensitive zone width, namely, when the exposure is a proper exposurefor the film of a wide latitude but the exposure is an over-exposure forthe film of a narrow latitude, the mark remains extinct while the markis turned on and off, or the mark is continuously displayed while themark is turned on and off, or the mark is continuously displayed whilethe manually selected shutter time display value is turned on and off,and (3) when the exposure is fit in the narrower insensitive zone width,the marksand and the shutter time value are continuously displayed orthe marks and are erased while only the shutter time value is displayedand when the exposure further changes toward the under side, a displayreverse in relation to the aforementioned display when the exposurechanges toward the over side is effected, then any desired insensitivezone width can be properly used even if the insensitive zone widthchange-over switch is not changed over.

Also, in the present invention, the common input of the comparators C₁-C_(n) of the shutter time displaying A/D converter portion is changedover to the output voltage of the metering operational circuit or avoltage corresponding to a manually selected shutter time value by theshutter time change-over switch 7, but this may normally be connected tothe output of follower amplifier A₁. At such time, the shutter timedisplayed is always the proper shutter time value by the output of theexposure operational circuit 3.

Also, a display element for indicating whether the manually set shuttertime value provides over-exposure or under-exposure or proper exposureand a display element for displaying, in several stages, for example, inthe fashion of 1/2 E_(v), 1 E_(v) and 11/2 E_(v), how much the manuallyset shutter time value is deviated from the proper shutter time value,may the provided separately from each other. Further, the illustratedembodiment is an example in which the shutter time is controlled,whereas it is also possible to make such a design that the aperturevalue is automatically or manually controlled and it is displayed as adigital value.

The digital exposure value display device mentioned in the presentspecification includes not only devices which display the exposure valuesuch as shutter time actually in a numerical value, but also devices ofthe type in which numerals or the like indicative of the shutter timesto be displayed are arranged on a line in advance and the shutter timevalues are selected and displayed on the basis of the output of an A/Dconverter circuit.

In the device of the present invention, a single reference voltagegenerating circuit can be used for two different purposes and this leadsto a lower cost of manufacture.

I claim:
 1. A camera having a digital exposure display device (C₁-C_(n), 14, 15) for comparing a voltage associated with an exposurevalue such as a shutter time value or an aperture value obtained fromexposure operating means (P, 1, 2, 3, 4, 5, 6, A₁) with a plurality ofreference voltages produced by a reference voltage generating circuit(F₁) and thereby converting the exposure value into a digital signal anddigitally displaying said exposure value on the basis of said digitalsignal, said camera further having a digital fixed point match typeexposure display device comprising:an exposure value setting circuit (T)for generating a voltage associated with a manually set exposure value;differential amplifier circuit means (D) for generating a voltageincluding a voltage corresponding to the difference between the voltageof said exposure value setting circuit (T) and the voltage obtained fromsaid exposure operating means; forming means (l₁ -l₄) for forming afirst comparison voltage and a second comparison voltage greater thansaid first comparison voltage by using the output voltage of saidreference voltage generating circuit; comparing means (C) for comparingthe comparison voltage of said forming means (l₁ -l₄) with the output ofsaid differential circuit means (D) and producing a first signalvariable in condition depending on whether said output is smaller orgreater than said first comparison voltage and a second signal variablein condition depending on whether said output is greater or smaller thansaid second comparison voltage; and display means (14, 15) operative toeffect a display based on said first and second signals of saidcomparing means.
 2. A camera according to claim 1, wherein said formingmeans (l₁ -l₄) selects as a first comparison voltage a reference voltagesmaller by a predetermined voltage than a standard voltage (V₀) selectedfrom among the reference voltages of said reference voltage generatingcircuit (F₁) and as a second comparison voltage a reference voltagegreater by a predetermined voltage than said standard voltage (V₀), andsaid differential circuit means (D) has an adder circuit (A₃) for saiddifferential circuit means to produce a voltage comprising a voltagecorresponding to the difference between the voltage of said exposurevalue setting circuit (T) and the voltage obtained from said exposureoperating means, plus said standard voltage.
 3. A camera according toclaim 2, wherein said adder circuit (A₃) adds said standard voltage tothe voltage of said exposure value setting circuit (T).
 4. A cameraaccording to claim 2, wherein said forming means selects a thirdcomparison voltage smaller by a predetermined voltage than said firstcomparison voltage and a fourth comparison voltage greater by apredetermined voltage than said second comparison voltage from among thereference voltages of said reference voltage generating circuit (F₁) andapplies the third and fourth comparison voltages to said comparingmeans, said comparing means produces a third signal variable incondition depending on whether the output of said differential circuitmeans (D) is greater or smaller than said third comparison voltage andfurther puts out a fourth signal variable in condition depending onwhether said output is smaller or greater than said fourth comparisonvoltage, and said display means (14, 15) further effects a display basedon the third and fourth signals of said comparing means.
 5. A cameraaccording to claim 1, wherein said exposure value setting circuit (T)has selecting means (7 and A₁₀ in FIG. 10) for selectively producing thereference voltages of said reference voltage generating circuit (F₁). 6.A camera having a digital exposure display device (C₁ -C_(n), 14, 15)for comparing a voltage associated with an exposure value such as ashutter time or an aperture value obtained from exposure operating means(P, 1, 2, 3, A₁) with a plurality of reference voltages produced by areference voltage generating circuit (F₂) and thereby converting saidvoltage into a digital signal and digitally displaying said exposurevalue on the basis of said digital signal, said camera further having anexposure control circuit (C_(o), 8) for controlling the exposure inaccordance with an input voltage, and a manual exposure setting devicecomprising:output means for producing the plurality of referencevoltages generated by said reference voltage generating circuit (F₂);and selecting means for selecting any one of the voltages produced bysaid output means and applying it to said exposure control circuit.
 7. Acamera according to claim 6, wherein said selecting means is furtherdesigned so as to be able to select the voltage from said exposureoperating means and apply it to said exposure control circuit, saidmanual exposure setting circuit further has level shift means (A₁₀, 90,80), and said level shift means inparts different level shift voltage tothe output voltage of said output means and the output voltage of saidexposure operating means.
 8. A camera according to claim 6, furtherhaving a digital fixed point match type exposure display devicecomprising:a differential amplifier circuit means (D) for producing avoltage including a voltage corresponding to the difference between thevoltage selected by said selecting means (7) and the voltage obtainedfrom said exposure operating means; forming means (l₁ -l₄) for forming afirst comparison voltage and a second comparison voltage greater thansaid first comparison voltage by using the output voltage of saidreference voltage generating circuit; comparing means (C) for comparingthe comparison voltage of said forming means (l₁ -l₄) with the output ofsaid differential circuit means (D) and producing a first signalvariable in condition depending on whether said output is smaller orgreater than said first comparison voltage and a second signal variablein condition depending on whether said output is greater or smaller thansaid second comparison voltage; and display means (14, 15) operative toeffect a display based on said first and second signals of saidcomparing means.
 9. A camera according to claim 8, wherein said formingmeans (l₁ -l₄) selects as a first comparison voltage a reference voltagesmaller by a predetermined voltage (ΔV) than a standard voltage (V_(o))selected from among the reference voltages of said reference voltagegenerating circuit (F₁) and as a second comparison voltage a referencevoltage greater by a predetermined voltage (ΔV) than said standardvoltage (V_(o)), and said differential circuit means (D) has an addercircuit (A₃) for said differential circuit means to produce a voltagecomprising a voltage corresponding to the difference between the voltageof said exposure value setting circuit (T) and the voltage obtained fromsaid exposure operating means, plus said standard voltage.